Arbetsbeskrivning

Role: ASIC Verification Engineer

Seniority Level: Senior

Location: Stockholm, Sweden

Remote Work: Not available (100% onsite)

Application Deadline: June 1, 2025

Assignment Description

We are currently seeking a Senior ASIC Verification Engineer for a long-term assignment with our client in Stockholm.

Responsibilities

• Define verification strategies and requirements for ASIC designs based on functional specifications and Ericsson’s development processes.
• Develop verification environments and test cases to fulfill the verification plan.
• Measure and track functional and code coverage metrics, working toward coverage completion.
• Debug RTL code alongside designers.
• Collaborate with cross-functional development teams to understand overall product requirements and contribute to efficient solutions.
• Support continuous improvement in products, tools, and verification processes.
• Produce and maintain clear documentation throughout the development lifecycle.
• Mentor and support junior engineers on the team.

Requirements

• 5+ years of experience in ASIC verification.
• Master’s degree in Electrical or Computer Engineering, or equivalent.
• Strong knowledge of UVM methodology and SystemVerilog.
• Experience with Formal Verification methods.
• Preferably experienced in:
• C programming
• Emulation techniques
• High-Level Synthesis (HLS)
• Strong analytical and problem-solving skills.
• Results-driven and able to perform under pressure.
• Excellent communication skills in English (written and spoken).
• Self-motivated with the ability to work independently and in a team environment.

Required Skills

• ASIC Verification
• UVM Methodology
• SystemVerilog
• Formal Verification
• Emulation
• High-Level Synthesis (HLS)
• C Programming

Language Requirements

• English – Professional proficiency